VLSI Architectures for Forward Error-Control Decoders:The Soft-Output Viterbi Algorithm

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The Soft-Output Viterbi Algorithm

The Viterbi decoder described so far generates the most likely transmitted bit sequence based on channel observations and the knowledge of the encoder state transition table. The soft-output Viterbi algorithm (SOVA) [43] provides the reliability of each bit in the decoded sequence in addition to the decoded sequence. Reliability of a bit u(k) is quantified by the log-likelihood ratio (LLR) which is given by

VLSI Architectures for Forward Error-Control Decoders-0116

where pe(u(k)) is the probability of error of bit u(k). The LLRs are referred to as soft outputs. These soft outputs improve decoding performance in both serial and parallel concatenated decoders such as turbo decoders, which will be described in Section 82.4.

It is easy to show that the probability of the encoder state sequence being the same as the survivor path of state si(k) is given by

VLSI Architectures for Forward Error-Control Decoders-0117

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