WHAT IS LAYOUT DESIGN?

WHAT IS LAYOUT DESIGN?

We define layout design as follows:

The process of creating an accurate physical representation of an engineering drawing (netlist) that conforms to constraints imposed by the manufacturing process, the design flow, and the performance requirements shown to be feasible by simulation.

Let’s look at this definition in greater detail as there are numerous implications buried within.

A process: First and foremost, layout design is a process with many steps that should be followed in a logical order for optimal results. For example, the “process” of layout design may include setting up a database or suite of tools with the appropriate layers; defining the floorplan of each cell or chip; and/or running verification checks in the proper order.

Creation: “Design” and “creation” are usually synonymous, and layout design is no exception. Implementing one schematic in two different technologies usually results in layouts that look quite different, thus demonstrating the creative nature of the trade. In the same way, a schematic that will be used in two differ- ent regions of the chip may result in two different architectures, adapted to their geographical location.

Accuracy: Although layout design is a creative process, we must not forget that the first requirement of the final layout must be that it is equivalent on a transistor-by-transistor basis to the engineering drawing. Redesigning the configuration of transistors to “improve” the circuit is not the role of the layout designer unless you plan to take over (or already have taken over) the circuit design task as well.

Physical representation: CMOS ICs are made using an extremely complicated process that in the end results in tiny transistors and wires being constructed and connected on a silicon substrate. Layout design is the art of drawing these transistors and wires as they look like in silicon; thus, the layout can be thought of as the physical representation of the circuit.

Engineering drawing: This may sound a bit old-fashioned, but it is accurate. Transistor-level or gate-level schematics have historically been the primary “drawing” and in many companies they remain so. Fancier methodologies these days result in some layout designers receiving a large text-based file called a “netlist.” However, in order for humans to understand a netlist, it is usually accompanied by a block-level schematic or drawing. Engineers (or equivalents) are the main providers of the drawings, but as the industry changes this may change as well.

Conform: By conforming, we mean “meeting the requirements of” and not necessarily “the smallest or best design possible.” There are many trade-offs to be made in the process of design: reliability, manufacturability, flexibility, and (perhaps most importantly) time to market, to name a few. Of course, there are minimum requirements that have to be met, but to achieve the optimal design at the expense of the project schedule is not practical in today’s marketplace.

Constraints imposed by the manufacturing process: These constraints include layout design rules such as the smallest width a metal track can be, but also many other manufacturability or reliability guidelines that will improve the overall quality of the layout. For example, in the case of a metal track, a wider line may improve the manufacturability of the design and thus should be used where space permits.

Constraints imposed by the design flow: These constraints include guidelines established to enable all other tools that are to be used in the design flow to be able to efficiently use the completed layout. For example, some routers like to have connections to cells on a regular pitch, while others do not care. Another example is the methodology to add text to layout so that the text can be used later for identification purposes.

Constraints imposed by the performance requirements shown to be feasible by simulation: An engineer completing a circuit design without detailed knowledge of how the circuit will be implemented in layout is required to make some assumptions. For example, the engineer designing the circuit will not know the exact area of the block without implementing the circuit in layout and so must make an educated estimate based on the information available. The total area figure may be important to know so that the maximum line length within the block is also known. This normally cannot be avoided, and the trick is to try to communicate these assumptions and thus constrain the layout accordingly. In our example the total area estimate used by the circuit designer should also be used by the layout designer as a target area, and differences from this estimate on the low or high side should be fed back to the circuit designer for resimulation.

In summary, layout design encompasses many different areas; it requires many different skills; and there are many trade-offs and decisions to be made that affect the quality of the final implementation. Great layout design requires a sound understanding of all of these issues, and we hope to cover all of them in various degrees throughout this book.