Timing and Signal Integrity Analysis:Modeling of Interconnect and Gates for Noise Analysis.

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Modeling of Interconnect and Gates for Noise Analysis

Let us consider the example of Figure 63.12(a) where three wires are running in parallel and are capac- itively coupled to each other. Suppose that we are interested in finding the noise that is induced on the middle net by the adjacent nets switching. The middle net is called the victim net and the two neighboring nets are called aggressors. Consider the situation when the victim net is held to a stable logic zero value by the victim driver and both the aggressor nets are switching high. Due to the coupling between the nets, a low overshoot noise will be induced on the victim net as shown in Figure 63.12(a). If the noise pulse is large and wide enough, the victim receiver may switch and cause a wrong value at the output of the inverter.

The circuit-level models for this system are explained below and shown in Figure 63.12(b).

1. The (net) complex consisting of the victim and aggressor nets is modeled as a coupled distributed RC network. The coupled RC lines are typically output by a parasitic extraction tool.

2. The non-linear victim driver is holding the victim net to a stable value. We model the non-linear driver as a linear holding resistance. For example, if the victim driver holds the output to logic 0 (logic 1), we determine an effective NMOS (PMOS) resistance. The value of the holding resistance for a gate can be obtained by pre-characterization using SPICE.

Timing and Signal Integrity Analysis-0240

3. The aggressor driver is modeled as a Thevenin voltage source in series with a switching resistance.

The Thevenin voltage source is modeled as a shifted ramp, where the ramp starts switching at time t0 and the transition time is ∆t. The switching resistance is denoted by Rs .

4. The victim receiver is modeled as a capacitor of value equal to the input capacitance of the gate.

These models convert the non-linear circuit into a linear circuit. The multiple sources in this linear circuit can now be analyzed using linear superposition. For each aggressor, we get a noise pulse at the sink(s) of the victim net, while shorting the other aggressors. These noise pulses have different amplitudes and widths; the amplitude and width of the composite noise waveform is obtained by aligning these noise pulses so that their peaks line up. This is a conservative assumption to simulate the worst-case noise situation.

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