RF Communication Circuits:Transmitter

Transmitter

Most RF communication systems are based on bidirectional data trafﬁc. This means that apart from the receiver section, a transmitter section must also be implemented to complete a full transceiver. As explained in Section 60.2, a transmitter commonly includes a number of mixers, LOs and a PA. The LO has been dealt with in a previous section; this section will therefore only describe the mixer and the PA used in upconversion or transmitter systems.

Up versus Downconversion

Although a large amount of literature exists on the downconversion process, upconversion has been neglected for a long time. This is rather surprising. When looking at Figure 60.5, one immediately notices the parallelism between the receiver and the transmitter. The same functionality occurs. Both paths contain an ampliﬁer (LNA, PA), both contain an interface to the digital domain (A/D, D/A), both contain a mixer, and both are steered by the same LO system. The nature of the signals in both paths (input and output) have a signiﬁcant inﬂuence on the circuit implementation. This seems logical for the LNA/PA analogy or the A/D and D/A converter. Both have completely different topologies. Although the mixers in the upcon- version path and the downconversion path face the same signals, there is typically not a great difference between the up- and downconversion mixer topology. Most implementations are variations on the four- quadrant mixer topology, better known as the Gilbert cell [42]. There are, however, fundamental differences between up- and downconversion. The ﬁrst fundamental difference is located in the input signals of the mixer. In case of a downconversion mixer, the input usually is a high-frequency, low-power signal sur- rounded by large blocking signals. In case of an upconversion, the input signal is a locally generated large baseband signal with a clean spectrum. At the output side, the situation is the opposite. A downconverted signal is a low-frequency signal. It is therefore relatively easy to ﬁlter or apply feedback to cope with unwanted signals. At the transmitter side, however, a large and linear signal has to be processed within the technology- dependent limited frequency range. Every extra building block placed between the mixer and the PA has to deal with high-frequency signals. Filtering is therefore impossible behind the upconversion mixer as it will require a large amount of power. Therefore LO-leakage and other unwanted signals like intermodulation products have to be limited. A last, but not least difference lies within one of the design speciﬁcations of a mixer, the conversion gain Gc. It is deﬁned as the ratio between the input power of the mixer and the output power. At the receiver side, the mixer input power is a design constraint as it is determined by the application. At the transmitter side, both input and output power are design variables. They can both be chosen freely. As it is easier and more power friendly to amplify a low-frequency signal, a large baseband signal is preferred.

CMOS Mixer Topologies

Switching Modulators

Many mixer implementations are based on the traditional variable transconductance multiplier with cross-coupled differential modulator stages [42]. It is depicted in Figure 60.15. The circuit was originally implemented in a bipolar technology and therefore based on its inherent translinear behavior. The MOS counterpart however can only be effectively used in the switching mode. This involves the use of large LO-driving signals and results in large LO-feedthrough and power consumption. Moreover, when using a square-wave-type modulation signal, a lot of energy is located at the third harmonic. This unwanted

signal can only be ﬁltered out by an extra blocking ﬁlter at the output. In CMOS the variable transcon- ductance is typically implemented using a differential pair biased in the saturation region. To avoid distortion problems, large Vgs - VT values or a large source degeneration resistor is needed. This results in a large power consumption and noise problems. For upconversion, one also has to be aware that the high-frequency current has to run through the modulating transistors. The source degeneration is therefore limited by bandwidth constraints. These problems can be circumvented by replacing the bottom differential pair with a pseudodifferential topology biased in the linear region [43].

Linear MOS Mixers

Figure 60.16 presents a linear CMOS mixer topology together with an output driver [44,45]. The circuit implements a real single-ended output topology avoiding the use of external combining. Some basic design ideas and some guidelines to optimize the circuit will be presented. The circuit is based on an intrinsically linear mixer topology. The circuit features four mixer transistors biased in the linear region. Each mixer converts a quadrature LO voltage and a baseband signal to a linearly modulated current. The expression for the source-drain current for a MOS transistor in the linear region is given by

Two signals have to be applied to a mixer transistor, the low-frequency baseband signal and the high- frequency LO signal. Applying these signals may only result in the desired high-frequency currents. Based on Eq. (60.31), some conclusions can be drawn.

If the LO signal is applied to the drain/source of the mixer transistor, a product term

is formed. As this contains the product of a DC voltage with the oscillator signal, this component is located at LO frequency. It is preferable to avoid the formation of this frequency component. Therefore, the LO signal should not be applied to this node. Applying the LO signal to the gate of the mixer transistors results in the desired behavior. According to Eq. (60.31), only the high-frequency components are formed by

By applying a zero-DC voltage between the source and drain, only the high-frequency mixer product is generated. The voltage to current conversion is perfectly balanced. The current of the four mixer paths are immediately added at the output of the mixers at a common node. This requires a virtual ground at that point that is achieved owing to the low-impedance input of the buffer stage (Figure 60.16). The total current ﬂowing into the output buffer is given by

Eq. (60.32) shows two frequency components in the modulated waveform. bvLOvbb is the desired signal.

To prevent intermodulation products of the low-frequency baseband signal bvbb with the desired RF signal, the LF signal has to be suppressed at the current summing node. This is achieved by a low-frequency feedback loop in the output buffer.

The low-frequency feedback loop consists of OTA1 and transistors M1 and M3. It suppresses the low- frequency signals resulting in a higher dynamic range of the output stage and decreases unwanted intermodulation products. It also lowers the input impedance of the output stage at low-frequencies. The structure in fact separates the high-and low-frequency component of the input current and prevents the low-frequency component from being mirrored to the output stage. The RF current buffer also ensures a low-impedance at high-frequencies at the mixer current summing node and therefore provides the necessary virtual ground.

Non-Linearity and LO-Feedthrough Analysis

The difﬁculty in integrating IF ﬁlters is one of the reasons why direct conversion transmitters are implemented. This implies that the LO is at the same frequency as the RF signal and cannot be ﬁltered out. To minimize the spurious-signal components at the LO frequency, one has to isolate the origins of the unwanted frequency components. They can be categorized into three topics: capacitive feedthrough owing to gate-source and gate-drain parasitic overlap capacitances, intrinsic nonlinearity of the mixers, and mixer products owing to a nonideal virtual ground.

When an ideal virtual ground is provided at the output of the mixer, capacitive LO-feedthrough is canceled. This cancellation is never perfect however, owing to technology mismatch. The capacitive LO-feedthrough for a single-mixer transistor, biased in the linear region is therefore given by

where cox is the oxide capacitance, Cov the gate-drain/source overlap capacitance, vLO the amplitude of the LO signal and f its frequency. Based on Eq. (60.32) and Eq. (60.33), the ratio between the LO-feedthrough current and the modulated current is given by

where d(iLO)accounts for the relative difference in LO-feedthrough for the different mixer transistors owing to mismatch. Eq. (60.34) shows that the ratio between the modulated current and the LO- feedthrough current is independent of the LO amplitude and the transistor width. Feedthrough will be less if shorter transistor lengths are used. The relative matching between the different mixer transistors will become worse however when shorter lengths are used [46]. One must therefore use Eq. (60.34) with care. The d will increase for a smaller transistor length. With proper design and optimization, one should however be able to achieve a 30 dBc signal to LO-feedthrough ratio even if two LO-feedthrough currents are added instead of being canceled by the virtual ground (d(iLO = 1). When more realistic numbers of mismatch are considered (e.g., 10%), 50 dBc is easily achieved. The presented equations can therefore be used by the experienced designer to estimate the matching requirements and check if these require- ments are realistic.

Another problem one faces is a possible DC-offset between the source and drain terminal of the mixer transistor. Eq. (60.31) explains the problem. Ideally, no DC is present. The mixer then shows the required behavior. When a DC is present, however, one can see that components are generated at DC, the LO frequency owing to multiplication with vg and a component at baseband. While the low-frequency components can be ﬁltered out by the low-frequency feedback in the output buffer, the component at the LO frequency remains. This component will therefore set the requirements for the tolerated DC-offset. A possible solution for this problem is measuring the DC-offset between the source and drain. The offset is then controllable. The offset requirement is translated into an offset speciﬁcation on the op-amps used in the feedback loops in the output buffer.

If the common mixer node is not a ideal virtual ground, the modulated current will be converted to a voltage dependent on the impedance seen on that node. The spectrum of the modulated signal will therefore be a combination of the modulated current spectrum and the frequency dependence of the impedance. When a impedance Zc is considered at the common mixer node, the modulated current is given as the result of a second-order equation

It can be noticed that when Zc = 0, Eq. (60.35) is reduced to Eq. (60.32). As Eq. (60.35) is a second-order equation, it is a possible origin of distortion and therefore has to be taken into account. Note that only currents that are not canceled out by the differential character of the mixer are converted in a voltage. This advantage of a balanced structure however is not valid for a nonideal voltage source at the input of the mixer transistors. If a nonideal voltage source is used at this node, each frequency component of the modulated current will be converted into a voltage according to the speciﬁc frequency-dependent imped- ance. These voltages are then, similar to the baseband signal upconverted to the LO frequency. It is therefore essential to keep this node a low-impedance one as far as possible.

Eq. (60.32) is only valid if a very low impedance is seen at the source and drain terminals of the mixer transistors. If this condition is fulﬁlled, no unwanted high-frequency mixing components are present in the modulated signal. However, both in measurements and in simulations, a signiﬁcant unwanted signal is noticed at fLO ± 3fbb. One expects this component to originate from a vLO v 3 product term. However, Eq. (60.35) only shows a second-order relationship. The observed product term must therefore ﬁnd its origin in another effect. It is proved to be a result of short-channel effects in a MOS transistor. Both the effective mobility and the threshold voltage are affected by the gate-source and drain-source voltage. The calculated impact of the threshold voltage modulation cannot explain the observed effect, it is therefore assumed that it is a result of the mobility modulation. After some calculations, one can prove that the effective mobility is

Eq. (60.37) shows that a second-order baseband frequency component cos(2wbbt) appears. In the DC reduction factor B, the third term is an order of magnitude smaller than 1. Hence it appears that the magnitude C of the second-order component has a ﬁrst-order relationship to the baseband signal amplitude A. In the voltage to current relationship, µeff is multiplied with vLOvbb. As a result a mixing component at fLO ± 3fbb occurs. In the amplitude C of this distortion component, µ0/(VmaxL) is dominant to q/2 for most submicron technologies. It is also important to notice that the distortion is inversely proportional to the gate length. This indicates that this effect will become even more apparent as gate lengths continue to scale down.

CMOS Power Amplification

The integration of PAs in a CMOS technology is impeded by the low supply voltage of the current deep-submicron and nanometer technologies. Apart from this, the relative high parasitic capacitances of the MOS transistor, at least compared to the GaAs or SiGe transistors, and the relative low-quality factor of on-chip inductors, further hinders the integration. On the other hand, the digital MOS transistor is optimized for switching and as such a lot of switching ampliﬁers have been integrated in CMOS with great success recently [47–53]. Furthermore, CMOS RF ampliﬁers are capable of breaking the 1-W barrier of output power performance [54]. In this section, the topic of switching RF ampliﬁer is discussed ﬁrst. In the second part, some linearization techniques will be discussed.

Switching Class E Amplifier

The Class E ampliﬁer was invented in 1975 [55], but the ﬁrst implementation of this ampliﬁer in CMOS was reported in 1997 [47]. In contrast to the Class A, B, C, and F ampliﬁers, the Class E ampliﬁer is designed in the time domain. Theoretically, the Class E ampliﬁer is capable of achieving an efﬁciency of 100%. To achieve this, the transistor and output network are designed in such a way that the drain through the transistor is separated in time from the voltage across the transistor. This avoids power dissipation in the transistor, a necessary requirement to achieve a high efﬁciency. If all other elements are assumed to be lossless, the ampliﬁer is then indeed capable of achieving an efﬁciency of 100%. Figure 60.17 depicts the basic circuit of a CMOS Class E ampliﬁer. The nMOS transistor should act as a switch and therefore it is driven by a square wave between zero and the maximum permissible gate voltage, which is normally equal to VDD, the supply voltage of the technology. As such the nMOS transistor can be modeled by an ideal switch with a series resistance Ron. Inductor L1 can be seen as the DC feed inductance, and in the original Class E theory, this inductor is assumed to be very large, and can be replaced by an ideal current source. Finally, inductor Lx and capacitor C1 are the two crucial elements that create the Class E waveform at the drain of the nMOS transistor.

In a fully integrated CMOS implementation, the DC feed inductor L1 cannot be made very large. First, this would require a huge silicon area, but more importantly the relative high power loss of CMOS integrated inductors does not allow for such a large value. As such, the value of L1 has to be reduced and the current through the latter will not be a constant. The ampliﬁer can still be designed to meet the Class E conditions, even with a small value of L1. In fact, reducing the value of L1 will result in a larger value for C1 and a smaller one for Lx.

The capacitor C1 and inductor Lx are constrained by the two Class E requirements, given as follows:

is a useful deﬁnition for stand-alone PAs that have an input matched to 50 W. However, one should know whether the DC power consumption of the driver stages is included in PDC.

Another important aspect of switching ampliﬁers is the reliability. A drawback of the Class E ampliﬁer, at least compared to the Class B and F ones, is that the drain voltage goes up to several times the supply voltage of the ampliﬁer. This might cause reliability problems. On the other hand, the switching nature of the ampliﬁer alleviates this. After all, owing to the switching, the voltage and current are separated in time. In other words, the high-voltage peaks are not accompanied by a drain current, and when the drain current is high, the voltage across the switch is low. This is a big advantage compared to other types of ampliﬁers.

Figure 60.17 depicts another beneﬁt of the Class E ampliﬁer. For Class E operation, a shunt capacitance C1 is required at the drain. However, in CMOS, there is already a large parasitic drain capacitance, and it can now become part of the ampliﬁer. In Class B and Class F ampliﬁers, it will create a low impedance for the harmonics that are crucial for the high efﬁciency of these ampliﬁers. Therefore, CMOS seems to be the logical choice for the Class E ampliﬁer.

Linearization of CMOS RF PAs

Switching ampliﬁers only have phase linearity, and therefore are only useful for constant envelope systems like Bluetooth and GSM. However, modern RF communication systems like UMTS, CDMA-2000, and WLAN, allow amplitude modulation to increase the data rate of a wireless link. The only way to recover or restore the amplitude linearity of a switching ampliﬁer is by modulating the supply voltage or by combining two nonlinear ampliﬁers. Systems that modulate the supply voltage of a switching ampliﬁer are denoted as Envelope Elimination and Restoration (EER), Polar Modulation, or Supply Modulation. They originate from the Khan technique (see Figure 60.19) that was already employed in vacuum tube ampliﬁers. In CMOS, one can make use of the availability of digital signal processing to directly create the amplitude and phase signal, and as such, the limiter and envelope detector of Figure 60.19 can be avoided. Furthermore, AM-AM and AM-PM predistortion is relatively easy to implement. The general picture of polar modulation is shown in Figure 60.20. Another advantage of polar modulated ampliﬁers is that the entire phase path carries a constant envelope signal and thus one can use nonlinear or saturated blocks in the upconversion path. Furthermore, amplitude and phase feedback are relatively easy to implement. Another group of techniques combine the output of two constant envelope ampliﬁers that have a difference in phase. The two

ampliﬁers are combined through a transformer, a power combiner, or through transmission lines, and the output is, in general, the sum of the two ampliﬁers. These systems are called Outphasing or LINC (Linear ampliﬁcation with nonlinear components), depending on the used combiner. Depending on their phase difference, the resulting output envelope can be higher or lower, and thus has amplitude modulation, as shown in Figure 60.21. The major drawback of these techniques is the difﬁculty to implement the power combiner in CMOS. Also, feedback is not as easy to implement in these systems. On the other hand, these systems allow to efﬁciently amplify signals that have a very high modulation bandwidth.

Apart from the two groups discussed in this section, several other techniques exist to amplify an amplitude-modulated signal. There is no ideal solution for CMOS integration. An alternative solution or approach is to use a linear ampliﬁer with an efﬁciency improvement technique such as the Doherty ampliﬁer or the bias adaption technique. However, the linearization of nonlinear ampliﬁers has the advantage that switching or nonlinear ampliﬁers that can be used are easier to implement in CMOS. Furthermore, the RF driver stages and all the blocks preceding the RF ampliﬁer can be nonlinear as well. Needless to say, this is a signiﬁcant advantage in low-voltage technologies.

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