RF Communication Circuits:Technology
Technology
Active Devices
Since all high- or system-level designs in the end need to be implemented in terms of actual active and passive components, it is not surprising that the performance of the transistor is of major importance for the overall system performance. It is therefore imperative to know the performance limitations of the technology that one is working with and to be aware of the shortcomings of the model that one is using. It is clear that conformity between measurements and simulation results will strongly depend on the accuracy of the models used with respect to the actual behavior of the devices. Although several compact models exist to describe MOSFET transistors, the BSIM [19] is considered as the de-facto standard because it is the model that is generally provided by silicon foundries. Most models are quite accurate for low frequencies; however, most models fail when higher frequencies are to be modeled. “High frequency” means operating frequencies around one-tenth of the transistor’s cutoff frequency ft. Figure 60.6 gives an overview of ft for different technology nodes. For example, for a standard 0.18 µm CMOS technology with an ft of ~50 GHz, 5 GHz is considered to be a high frequency. Another parameter is plotted in Figure 60.6, f3dB reflects the speed limitation of a transistor in a practical configuration. It is defined as the 3 dB point of a diode-connected transistor [20] and takes into account the parasitic speed limitation owing to overlap capacitances, drain-bulk junction, and gate-source capacitance while ft only models the parasitic effect of the gate-source capacitance. In Ref. [21] an extended transistor model that can be used for circuit simulation
at RF frequencies is presented. It is shown in Figure 60.7. All the extrinsic components are pulled out of the MOS transistor model, so that the MOS transistor symbol only represents the intrinsic part of the device. This allows to have access to internal nodes and model extrinsic components such as series resistances and overlap capacitances in a way different from what is available in the complete model. The source and drain series resistors are added outside the MOS model since the series resistances internal to the compact model is only used in the calculation of the I–V characteristic to account for the DC voltage drop across the source and drain. They do not add any poles and are therefore invisible for AC simulation. The gate resistance is usually not part of a MOSFET model, but plays a fundamental role in RF circuits and is therefore of utmost importance. The substrate resistors Rdsb, Rsb, and Rdb have been added to account for the signal coupling through the substrate.
Apart from the extra components added in the extended transistor model presented in Ref. [21], another point deserves some attention. The classical transistor model is based on the so-called quasi- static assumption. This means that any positive (negative) change in charge at the gate is immediately compensated by a negative (positive) change of charge in the channel. In reality, however, there will always be a delay in the charge buildup in the channel. Individual electrons (holes), will need a finite time to travel from the bulk to the channel. This effect is called the nonquasi-static effect and has been
described in Refs. [22–24]. This effect can be modelled by adding a resistance in series with the gate- source capacitance, introducing an extra time constant in the model:
Passive Devices
For a long time, CMOS RF integration was believed to be impossible owing to the poor quality of passive devices. Smaller CMOS geometries and innovative design and layout [25–27], however, have enabled high-quality passive components at high frequency to be integrated on chip. Four passive devices (resis- tors, inductors, capacitors, and varactors) will be discussed. First, one needs figure of merit to qualify these passive devices. In general, the Q-factor is used for this purpose. Although there exist several definitions for the Q-factor, the most fundamental definition is based on the ratio between the maximum energy storage and the average power dissipation during one cycle in the device:
For an overview of other definitions of the Q-factor, the reader is referred to Ref. [28]. For a purely reactive element (capacitor or inductor), current through the element and voltage over the element are 90° out of phase. Hence no power is dissipated in it. In reality, however, a certain amount of power will always be dissipated. Power dissipation assumes the presence of a resistance and a resistance always generates thermal noise. The Q-factor consequently is also a way of describing the pureness of a reactive device. Figure 60.8 shows some very common structures used in the modeling of reactive components used in RF circuits together with their Q-factor according to definition (60.9). Low-ohmic resistors are commonly available now in all CMOS technologies and their parasitic capacitance is such that they allow for more than high enough bandwidth. A more important passive device is the capacitor. In RF circuits, capacitors can be used for AC coupling. This enables DC-level shifting between different stages resulting
in an extra degree of freedom enabling an optimal design of each stage. It also offers the possibility of lowering the power supply voltages. Another field, although not completely RF, where capacitors are commonly used is to implement switched capacitor circuits or arrays. This is more favorable than using common resistors since capacitors in general offer better matching properties than resistors do. The quality of an integrated capacitor is mainly determined by the ratio between the capacitance value and the value of the parasitic capacitance to the substrate. Too high a parasitic capacitor loads the transistor stages, thus reducing their bandwidth, and it causes an inherent signal loss owing to a capacitive division.
The passive device however that got the most attention in the past is the inductor. It was long believed that high-quality integrated inductors were simply impossible in standard CMOS processes [29] and were rather avoided if possible. However, owing to the use of hollow spiral inductors and slightly altered process technology (thick top metal layer), one is now able to produce high-Q inductors in CMOS. The use of inductors on chip allows a further reduction of the power supply and offers compensation for parasitic capacitors by tuning them away resulting in higher operating frequencies.
To be able to use integrated inductors in actual designs, an accurate model is needed. Ref. [30] introduces such a model. One of the problems faced when modeling an inductor is how to model the substrate. One of the major drawbacks of inductors are the losses introduced by the substrate underneath the coil by capacitive coupling and eddy currents. This reduces the quality factor of the inductor.
A last passive component that is often encountered in RF CMOS designs is the varactor. It is mostly used for implementing tunable RF filters and VCOs. Varactors can be divided into two classes: junctions and MOS capacitors. The latter can be used in accumulation and in inversion mode. For all cases, the devices have to be placed in a separate well to be able to use the well potential as the tuning voltage. For a standard n-well process, the available configurations are therefore limited to p+/n- junction diodes and PMOS capacitors. When comparing the different varactor types, one should look at the following specifications: the varactor should offer a high Q-factor, the tuning range over which the capacitance can be varied should be compatible with the supply voltages used in the design, the physical structure should be as compact as possible to limit die area, and its capacitance variation should be uniform over the complete tuning range as this makes feedback design more easy. For an extended discussion on the different types of varactor and their performance, the reader is referred to Ref. [27].
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