Switched-Capacitor Filters:Performance Limitations

Performance Limitations

The arguments up to now described are valid assuming an ideal behavior of the devices in the SC network (i.e., opamp, switches, and capacitor). However, in the actual realization each of them presents nonidealities which reduce the performance accuracy of the complete SC circuit. The main limitations and their effects are described in the following. Finally, considerations about noise in SC systems conclude this section.

Limitation Due to Switches

As described before, CMOS switches satisfy both low on-resistance and zero voltage-drop requirements. However they introduce some performance limitations due to their intrinsic CMOS realization. The cross section of a NMOS switch in its on-state is shown in Figure 62.25. The connection between its nodes N1 and N2 is guaranteed by the presence of the channel, made up of the charge Qch. The amount of charge Qch can be written as

where Vi is the channel (input) voltage. Both nodes N1 and N2 are at voltage Vi (no voltage drop between the switch nodes). In addition, the gate oxide that guarantees infinite MOS input impedance constitutes a capacitive connection between gate and both source and drain. This situation results in two nonideal effects: the charge injection and the clock feedthrough.

Charge Injection

At the switch turn-off, the charge Qch given in Eq. (62.28) is removed from the channel and is shared between the two nodes connected to the switch, with a partition depending on the node impedance level (Figure 62.26).

The charge kQch is injected into N2 and collected on a capacitor Cc. A voltage variation DVc across the capacitor arises, which is given by

For all the switches of a typical SC integrator this effect is important. For instance, for the switch S4 connected to the opamp virtual ground, the charge injection into the virtual ground is collected in the feedback capacitor and is processed as an input signal. The amount of this charge injection depends on different parameters (see Eq. [62.28] and Eq. [62.29]). Charge Qch depends on switch size W, which however cannot be reduced beyond a certain level; otherwise the switch on-resistance should increase. Thus a trade-off between charge injection and on-resistance is present. In addition, charge Qch depends on the voltage Vi to which the switch is connected to. For the switches S2, S3, and S4, the injected charge is proportional to (VG -Vgnd) and is always fixed; as a consequence it can be considered like an offset. In contrast, for the switch S1 connected to the signal swing the channel charge Qch is dependent on (VG - Vi), i.e., from the signal amplitude and thus also the charge injection is signal-dependent. This creates an additional signal distortion.

Possible solutions for the reduction of the charge injection are use of dummy switches, use of slowly variable clock phase, use of differential structures, use of delayed clock phases [8], and use of signal- dependent charge pump [9].

Dummy switches operate with complementary phases to sink the charge rejected by the original switches. The use of differential structures reduces the offset charge injection to the mismatch of the two differential paths. For the signal-dependent charge injection, the delayed phases of Figure 62.27(b) are applied to the integrator of Figure 62.27(a). This clock phasing is based on the concept that at the turn- off, S3 is open before S1. In this way, when S1 opens, the impedance toward Cs is infinite and no signal- dependent charge injection occurs into Cs.

Clock Feedthrough

The clock feedthrough is the amount of signal that is injected into the sampling capacitor Cc from the clock phase through the MOS overlap capacitor (Cov) path, shown in Figure 62.26, which is then proportional to the area of the switches. Using large switches, to reduce on-resistance, results in large charge injection and large clock feedthrough. This error is typically constant (it depends on capacitance partition) and therefore it can be greatly reduced by using differential structures. The voltage error DVc across a capacitance Cc due to the feedthrough of the clock amplitude (VDD -VSS) can be written as

Limitation Due to the Opamp

The operation of SC networks is based on the availability of a “good” virtual ground, which ensures a complete charge transfer from the sampling capacitors to the feedback capacitor. Whenever this charge transfer is incompleted, the SC network performance derives from its nominal behavior. The main nonideality causes from the opamp are finite DC gain, finite bandwidth, finite slew rate, and gain nonlinearity.

Finite Opamp DC-Gain Effects

The opamp finite gain results in a deviation of output voltage at the end of the sampling period from the ideal one, as shown in Figure 62.28(a) [10,11]. This output sample deviation can be translated into SC system performance deviation. For the finite gain effect, an analysis, which correlates the opamp gain Ao with SC network performance deviation, can be carried out under the hypothesis that the opamp bandwidth is sufficiently large to settle within the available time slot.

For the case of the summing amplifier of Figure 62.10, it can be demonstrated that the effect of the finite opamp DC-gain (Ao) is only in a overall gain error. For this reason SC FIR filters (based on this scheme) exhibit a low sensitivity to opamp finite DC gain. In contrast, for the case of SC integrators, the finite gain effect results in pole and gain deviation. For instance, the transfer function of the integrator of Figure 62.8(a) becomes

Also opamp finite bandwidth and slew rate results in incomplete charge transfer, which still corresponds in deviation of the output sample with respect to its nominal value [10,11]. For the case of only finite bandwidth the effect is shown in Figure 62.28(b). An analysis similar to that of the finite gain for the finite bandwidth and slew-rate effect is not easy to be extracted. This is also due to the fact that incomplete settling is caused by the correlation of a linear effect (e.g., the finite bandwidth) and nonlinear effect (e.g., the slew rate). In addition, this case is worsened by the fact that in some structures several opamps are connected in cascade and then each opamp (a part the first one) has to wait for the operation conclusion of the preceding one.

Opamp Gain Nonlinearity

Since the SC structures allows to process large swing signals, for this signal swing the opamp has to perform constant gain. When the opamp gain is not constant for all the necessary output swing, distortion arises. An analysis can be carried out for the case of the integrator of Figure 62.8(a) [12]. Assuming an opamp input (vi)-to-output (vo) relationship expressed in the form

The distortion can then be reduced by making constant low gain (i.e., reducing a2 and a3) or using a very large opamp gain (i.e., increasing a1). This second case is usually the adopted strategy.

Noise in SC Systems

In SC circuits the main noise sources are in the switches (thermal noise) and in the opamp (thermal noise and 1/f noise) [13,14]. These noise sources are processed by the SC structure as an input signal, i.e., they are sampled (with consequent folding) and transferred to the output with a given transfer function. As explained for the signal, the output frequency range of an SC filter is limited to the band [0 - Fs/2]. This means that for any noise source, its sampled noise band, independently of how large it is at the source before sampling, is limited to the [0 - Fs/2] range. In contrast, the total power of noise remains constant after sampling; this means that the power density of sampled noise is increased by the factor Fb/(Fs/2), where Fb is the noise band at its source. This can be seen for the switch noise in the following simple example. Let us consider the structure in Figure 62.29, where the resistance represents the switch on-resistance. Its associated noise spectral density is given by v 2 = 4kTR , where k is the Boltzmann’s constant and T the absolute temperature. The transfer function to the output node (the voltage over the capacitor) is H(s) = 1/(1 + sRonCs). The total ouput noise can be calculated from the expression

For the opamp 1/f noise, the corner frequency is usually lower than Fs/2. Therefore the 1/f noise is not modified by the sampling. In contrast, the white noise presents definitely a bandwidth Fb > Fs/2. This means that this noise component is modified in noise sources of bandwidth Fs/2 and noise power density multiplied by the factor Fb/(Fs/2). When the noise sources are evaluated in this way, the output noise of an SC cell can be evaluated summing the different components properly weighted by their transfer functions from their source position to the output node.

Few considerations follow for the noise performance of a SC cell.

For the switch noise this is independent of Ron, since its dependence is cancelled in the bandwidth dependence. Thus this noise source is dependent only on Cs. Noise reduction is achieved by increasing Cs. This however trades with power increase necessary to drive the enlarged capacitance. Of course, even if Ron does not appear in the noise expression, as the capacitor in enlarged, the Ron must be adequately decreased to guarantee a proper sampling accuracy.

For the opamp noise, the noise band is usually correlated to the signal bandwidth. Therefore a good opamp settling (achieved with a large signal bandwidth) is in contrast with low-noise performance (achieved with reduced noise bandwidth). Therefore in low-noise systems, the bandwidth of the opamp is designed to be the minimum that guarantees proper settling.