Microelectronics Packaging:Package Modeling

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Package Modeling

Package modeling describes the physical structure that makes up the package by its equivalent electrical circuit for use in a circuit simulation program. As the complexity of devices increases, design and development efforts for packages become comparable to design and development efforts for chips. Many package design concepts must be simulated to assess their associated performance parameters. Computer- aided design software and test chips are becoming indispensable design tools. Computer-aided design tools are extensively used to analyze the thermal, thermomechanical, mechanical, and electrical parameters of packages and circuit simulation programs are used to evaluate the overall performance of a packaged circuit. Until now, the equivalent electrical circuit extracted from electric modeling incorporated only lumped electrical parameters, but as frequency of operation of the circuits is increasing, the distributed model of the package needs to be developed for high-frequency simulations [1,2,8,11,12,53,54].

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