CMOS:Pseudo-nMOS
Pseudo-nMOS
In the case of the CMOS discussed so far, each CMOS logic gate consists of a pair of pMOS and nMOS subcircuits which realize dual transmission functions, as explained with Figure 39.2. In design practice, however, some variations are often used. For example, Figure 39.8 realizes NOR. The pMOS subcircuit consists of only a single MOSFET. Thus, the chip area is reduced and the speed is faster than static CMOS discussed so far because of a smaller parasitic capacitance. But more power is dissipated for some combinations of input values [1] because the pMOS subcircuit in (a) is always conductive [9,10].
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