High-Frequency Amplifiers:Fundamentals of RF Power Amplifier Design

Fundamentals of RF Power Amplifier Design

Power Amplifier (PA) Requirements

An important functional block in wireless communication transceivers is the PA. The transceiver PA takes as input the modulated signal to be transmitted, and ampliﬁes this to the power level required to drive the antenna. Because the levels of power required to transmit the signal reliably are often fairly high, the PA is one of the major sources of power consumption in the transceiver. In many systems, power consumption may not be a major concern, as long as the signal can be transmitted with adequate power. For battery-powered systems, however, the limited amount of available energy means that the power consumed by all devices must be minimized so as to extend the transmit time. Therefore, power efﬁciency is one of the most important factors when evaluating the performance of a wireless system.

The basic requirement for a PA is the ability to work at low supply voltages as well as high operating frequencies, and the design becomes especially difﬁcult owing to the trade-offs between supply voltage, output power, distortion, and power efﬁciency which can be made. Moreover, since the PA deals with large signals, small-signal analysis methods cannot be applied directly. As a result, both the analysis and the design of PAs are challenging tasks.

This section will ﬁrst present a study of various conﬁgurations employed in the design of state-of-the- art nonlinear RF PAs. Practical considerations toward achieving full integration of PAs in CMOS technology will also be highlighted.

PA Classification

PAs currently employed for wireless communication applications can be classiﬁed into two categories: linear power ampliﬁers and nonlinear power ampliﬁers. For linear PAs, the output signal is controlled by the amplitude, frequency, and phase of the input signal. Conversely for nonlinear PAs, the output signal is only controlled by the frequency of input signal.

Conventionally, linear PAs can be classiﬁed as Class A, Class B, or Class AB. These PAs produce a magniﬁed replica of the input signal voltage or current waveform, and are typically used where accurate reproduction of both the envelope and the phase of the signal is required. However, either poor power efﬁciency or large distortion prevents them from being extensively employed in wireless communications. Many applications do not require linear RF ampliﬁcation. Gaussian Minimum Shift Keying (GMSK) [39], the modulation scheme used in the European standard for mobile communications (GSM), is an example of constant envelope modulation. In this case, the system can make use of the greater efﬁciency and simplicity offered by nonlinear PAs. The increased efﬁciency of nonlinear PAs such as Class C, Class D, and Class E, results from techniques that reduce the average collector voltage–current product (i.e., power dissipation) in the switching device. Theoretically, these switching-mode PAs have 100% power efﬁciency since ideally there is no power loss in the switching device.

Linear PAs

Class A

The basic structure of the class A PA is shown in Figure 24.25 [40]. For Class A ampliﬁcation, the conduction angle of the device is 360°, that is the transistor is in its active region for the entire input cycle. The serious shortcoming with Class A PAs is their inherently poor power efﬁciency, since the transistor is always dissipating power. The efﬁciency of a single-ended Class A PA is ideally limited to 50%. However, in practice, few designs can reach this ideal efﬁciency owing to additional power loss in the passive components. In an inductorless conﬁguration, the efﬁciency is only about 25% [41].

Class B

A PA is deﬁned as Class B when the conduction angle for each transistor of a push–pull pair is 180° during any one cycle. Figure 24.26 shows an inductorless Class B PA. Since each transistor only conducts

for half of the cycle, the output suffers crossover distortion owing to the ﬁnite threshold voltage of each transistor. When no signal is applied, there is no current ﬂowing, and as a result any current through either device ﬂows directly to the load, thereby maximazing the efﬁciency. The ideal efﬁciency can reach 78% [41] allowing this architecture to be of use in applications where linearity is not the main concern.

Class AB

The basic idea of Class AB ampliﬁcation is to preserve the Class B push–pull conﬁguration while improving the linearity by biasing each device slightly above the threshold. The implementation of Class AB PAs is similar to that of Class B conﬁgurations. By allowing the two devices to conduct current for a short period, the output voltage waveform during the crossover period can be smoothed which thus reduces the crossover distortion of the output signal.

Nonlinear PAs

Class C

A Class C PA is the most popular nonlinear PA used in the RF band. The conduction angle is less than 180° since the switching transistor is biased on the verge of conduction. A portion of the input signal will make the transistor operate in the amplifying region, and thus the drain current of the transistor is a pulsed signal. Figures 24.27(a) and (b) show the basic conﬁguration of a Class C PA and its corre- sponding waveforms; clearly the input and output voltages are not linearly related.

The efﬁciency of an ideal Class C ampliﬁer is 100% since at any point in time either the voltage or the current waveform is zero. In practice this ideal situation cannot be achieved, and the power efﬁciency

should be maximized by reducing the power loss in the transistor. That is, minimize the current through the transistor when the voltage across the output is high, and minimize the voltage across the output when the current ﬂows through the device.

Class D

A Class D ampliﬁer employs a pair of transistors and a tuned output circuit, where the transistors are driven to act as a two-pole switch and the output circuit is tuned to the switching frequency. The theoretical power efﬁciency is 100%. Figure 24.28 shows the voltage-switching conﬁguration of a Class D ampliﬁer. The input signals of transistors Q1 and Q2 are out of phase, and consequently, when Q1 is on, Q2 is off, and vice versa. Since the load network is a tuned circuit, we can assume that it provides little impedance to the operating frequency of the voltage vd and high impedance to other harmonics. Since vd is a square wave, its Fourier expansion is given by

The impedance of the RLC series load at resonance is equal to RL, and thus the current is given by

Class E

The idea behind the Class E PA is to employ nonoverlapping output voltage and output current wave- forms. Several criteria for optimizing the performance can be found in [42]. Following these guidelines, Class E PAs have high power efﬁciency, simplicity, and relatively high tolerance to circuit variations [43]. Since there is no power loss in the transistor as well as in the other passive components, the ideal power efﬁciency is 100%. Figure 24.29 shows a class E PA and the corresponding waveforms are given in Figure 24.30.

The Class E waveforms indicate that the transistor should be completely off before the voltage across it changes, and that the device should be completely on before it starts to allow current to ﬂow through it. References [44,45] demonstrate practical Class E operation at RF frequencies using a GaAs process.

Practical Considerations for RF Power Amplifiers

More recently, single-chip solutions for RF transceivers have become a goal for modern wireless com- munications owing to potential savings in power, size and cost. CMOS must clearly be the technology of choice for a single-chip transceiver owing to the large amount of digital baseband processing required. However, the PA design presents a bottleneck toward full integration, since CMOS PAs are still not available. The requirements of low supply voltage, gigahertz-band operation, and high output power make the implementation of CMOS PAs very demanding. The proposal of “microcell” communications may lead to a relaxed demand for output power levels which can be met by designs such as that described in Reference [46], where a CMOS Class C PA has demonstrated up to 50% power efﬁciency with 20 mW output power.

Nonlinear PAs seem to be popular for modern wireless communications owing to their inherent high power efﬁciency. Since signiﬁcant power losses occur in the passive inductors as well as the switching devices, the availability of on-chip low-loss passive inductors is important. The implementation of CMOS on-chip spiral inductors has therefore become an active research topic [47].

Owing to the poor spectral efﬁciency of a constant envelope modulation scheme, the high-power efﬁciency beneﬁt of nonlinear PAs is eliminated. A recently proposed linear transmitter using a nonlinear PA may prove to be an alternative solution [48]. The development of high-mobility devices such as SiGe HBTs has led to the design of PAs demonstrating output power levels up to 23 dBm at 1.9 GHz with power-added efﬁciency of 37% [49]. Practical PA designs require that much attention be paid to issues of package and harmonic terminations. Power losses in the matching networks must be absolutely minimized, and trade-offs between power-added efﬁciency and linearity are usually achieved through impedance matching. Although GaAs processes provide low-loss impedance matching structures on the semi-insulating substrate, good shielding techniques for CMOS may prove to be another alternative.

Conclusions

Although linear PAs provide conventional “easy-design” characteristics and linearity for modulation schemes such as p/4-DQPSK, modern wireless transceivers are more likely to employ nonlinear PAs owing to their much higher power efﬁciency. As the development of high-quality on-chip passive com- ponents makes progress, the trend toward full integration of the PA is becoming increasingly plausible. The rapid development of CMOS technology seems to be the most promising choice for PA integration, and vast improvements in frequency performance have been gained through device scaling. These improvements are expected to continue as silicon CMOS technologies scale further, driven by the demand for high-performance microprocessors. The further development of high-mobility devices such as SiGe HBTs may ﬁnally see GaAs MESFETs being replaced for wireless communication applications, since SiGe technology is compatible with CMOS.

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