Analog Circuit Simulation:Modified Nodal Analysis

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Modified Nodal Analysis

Normal nodal analysis that uses only Kirchoff ’s current law, cannot be used to represent ideal voltage sources or inductors. This is so because the branch current in these elements cannot be expressed as a function of the branch voltage. To resolve this problem, KVL is used to write a loop equation around each inductor or voltage source. Consider Figure 13.4 for an example of this procedure. The unknowns to be solved for are the voltage V1 at Node 1, V2 the voltage at Node 2, V3 the voltage at Node 3, the current flowing through voltage source V1 which we shall call Ix and the current flowing in the inductor L1 which we shall call I1. The system of equations is:

Analog Circuit Simulation-0121Analog Circuit Simulation-0122

The use of modified nodal analysis does have the disadvantage of requiring that an additional equation be included for each inductor or voltage source, but has the advantage that ideal voltage sources can be used. The total number of equations to be solved is therefore the number of nodes plus the number of voltages sources and inductors.

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