Bipolar Junction Transistor Circuits:High-Speed BJT Switching
High-Speed BJT Switching
There are three major effects that extend switching times in a BJT:
1. The depletion region or junction capacitances are responsible for delay time when the BJT is in the cutoff region.
2. The diffusion capacitance and the Miller-effect capacitance are responsible for the rise and fall times of the BJT as it switches through the active region.
3. The storage time constant accounts for the time taken to remove the excess charge from the base region before the BJT can switch from the saturation region to the active region.
There are other second-order effects that are generally negligible compared with the previously listed time lags.
Since the transistor is generally operating as a large-signal device, the parameters such as junction capacitance or diffusion capacitance will vary as the BJT switches. One approach to the evaluation of time constants is to calculate an average value of capacitance over the voltage swing that takes place. Not only is this method used in hand calculations, most computer simulation programs use average values to speed calculations.
Overall Transient Response
Before discussing the individual BJT switching times it is helpful to consider the response of a common- emitter switch to a rectangular waveform[5]. Figure 10.18 shows a typical circuit using an npn transistor. A rectangular input pulse and the corresponding output are shown in Figure 10.19. In many switching circuits, the BJT must switch from its off state to saturation and later return to the off state. In this case delay time, rise time, saturation storage time, and fall time must be considered in that order to find the overall switching time.
The total waveform is made up of five sections: delay time, rise time, on time, storage time, and fall time. The following list summarizes these points and serves as a guide for future reference:
td¢ = tf = fall time; 90–10% fall time of IC waveform
Ton = total turn-on time; time interval between application of base drive and the point at which
IC has reached 90% of its final value
Toff = total turn-off time; time interval between removal of forward base drive and the point at which IC has dropped to 10% of its value during on time.
Not all applications will require evaluation of each of these switching times. For instance, if the base drive is insufficient to saturate the transistor, ts will be zero. If the transistor never leaves the active region, delay time will also be zero. The factors involved in calculating the switching times are summarized in the following paragraphs [5].
where td is the product of the charging resistance and the average value of the two junction capacitances. The active region time constant is a function of the diffusion capacitance, the collector–base junction capacitance, the transconductance, and the charging resistance. This time constant is denoted by t. If the transistor never enters saturation, the rise time is calculated from the well-known formula
where K is the overdrive factor or the ratio of forward base current drive to the value needed for saturation. The rise time for the case where K is large can be much smaller than the rise time for the nonsaturating case (K < 1). Unfortunately, the saturation storage time increases for large values of K.
The saturation storage time is given by
where ts is the storage time constant, IB1 the forward base current before switching, and IB2 the current after switching and must be less than IB(sat). The saturation storage time can slow the overall switching time significantly. The higher speed logic gates utilize circuits that avoid the saturation region for the BJTs that make up the gate.
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