Heterojunction BJTs

Heterojunction BJTs

The classic silicon BJT that has served the industry since the 1950s is sometimes called a homojunction device since both junctions use the same material throughout. The junctions are formed by adding the proper impurities to make the silicon emitter, base, and collector regions either n- or p-type. The last two decades have seen a continual advancement in the area of the heterojunction bipolar transistor (HBT). These devices have junctions formed of dissimilar materials [8]. In recent years, the values of ft for some heterojunction BJTs have exceeded 100 GHz. Popular materials used in forming HBTs are silicon/ germanium, gallium–arsenide/aluminum–gallium–arsenide, and indium phosphide.

In an npn homojunction device, all electrons injected from emitter to base are collected by the collector, except for a small number that recombine in the base region. The holes injected from base to emitter contribute to emitter junction current, but do not contribute to collector current. This hole component of emitter current must be minimized to achieve a near-unity current gain from emitter to collector. As a approaches unity, the current gain from base to collector, b, becomes larger.

To produce high-b BJTs, the emitter region must be doped much more heavily than the base region as explained earlier. While this approach allows the value of b to reach several hundred, it also leads to some effects that limit the frequency of operation of the BJT. The lightly doped base region causes higher values of base resistance as well as emitter–base junction capacitance. Both of these effects are minimized in the HBT. The Si/Ge HBT uses silicon for the emitter and collector regions and a silicon/germanium mixture for the base region [6]. The difference in energy gap between the silicon emitter material and the silicon/germanium base material results in an asymmetric barrier to current flow across the junction. The barrier for electron injection from emitter to base is smaller than the barrier for hole injection from base to emitter. The base can then be doped more heavily than a conventional BJT to achieve lower base resistance, RB, but the hole flow across the junction remains negligible due to the higher barrier voltage. The emitter of the HBT can be doped more lightly to lower the junction capacitance, notably Cm. Large values of b are still possible in the HBT while minimizing frequency limitations.

From the standpoint of analysis, the Spice models for the HBT are structurally similar to those of the BJT. The major differences are in the parameter values. For example, Table 10.1 shows a comparison of typical Spice model parameters for a simple BJT process and a typical modern GaAs HBT process.

Table 10.1 demonstrates the smaller values of forward transit time, ohmic base resistance, and tran- sition capacitance for the HBT compared with the BJT. Because modern HBT devices can operate in tens of GHz range, layout parasitics such as capacitance between substrate and metal interconnect and between

different metal interconnects become significant and must be considered in the design and simulation of HBT circuits. Present-day software tools allow the extraction and inclusion of these layout and interconnect parasitics.

Two popular simulators used today for HBT circuits are Agilent’s ADS software and a similar CAD tool powered by ANSOFT. These simulators use device models and a syntax similar to Spice. The tools support both the Gummel–Poon models discussed earlier and a more complex model called the vertical bipolar inter-company model (VBIC) [9]. The VBIC model is an extension of the Gummel–Poon model

and accounts for additional effects, such as parasitic junction transistor action, avalanche multiplication, and self-heating effects. The self-heating of HBT devices is especially important since the oxide isolation used in the manufacturing process results in a high thermal resistance from the collector to the substrate. Although the VBIC model is thought to be more accurate, current simulators generally run faster using the Gummel–Poon model which tends to be used for initial design verification with final optimization done with VBIC models. Most HBT foundries support both the Gummel–Poon and VBIC models in their design kits for simulation.