CMOS Amplifier Design
Introduction
This chapter discusses the design, operation, and layout of CMOS analog amplifiers and subcircuits (current mirrors, biasing circuits, etc.). To make this discussion meaningful and clear, we need to define some important variables related to the DC operation of MOSFETs (Figure 22.1). Figure 22.1(a) shows the simplified schematic representations of n- and p-channel MOSFETs. We say simplified because, when these symbols are used, it is assumed that the fourth terminal of the MOSFET (i.e., the body connection) is connected to either the lowest potential on the chip (VSS or ground for the NMOS) or the highest potential (VDD for the PMOS). Figure 22.1(b) shows the more general schematic representation of n- and p-channel MOSFETs. We are assuming that, although the drain and source of the MOSFETs are interchangeable, drain current flows from the top of the device to the bottom. Because of the assumed direction of current flow, the drain terminal of the n-channel is on the top of the symbol, while the drain terminal of the p-channel is on the bottom of the schematic symbol. The following are short descriptions of some important characteristics of MOSFETs that will be useful in the following discussion.
The Threshold Voltage
Loosely defined, the threshold voltage, VTHN or VTHP , is the minimum gate-to-source voltage (VGS for the n-channel or VSG for the p-channel) that causes a current to flow when a voltage is applied between the drain and source of the MOSFET. As shown in Figure 22.1(c) the threshold voltage is estimated by plotting the square root of the drain current against the gate-source voltage of the MOSFET and looking at the intersection of the line tangent with this plot with the x-axis (VGS for the n-channel). As seen in the figure, a current does flow below the threshold voltage of the device. This current is termed, for obvious reasons, the subthreshold current. The subthreshold current is characterized by plotting the log of the drain current against the gate-source voltage. The slope of the curve in the subthreshold region (sometimes also called the weak inversion region) is used to specify how the drain current changes with VGS. A typical value for the reciprocal of the slope of this curve is 100 mV/dec. An equation relating the drain current of an n-channel MOSFET operating in the subthreshold region to VGS is (assuming VDS > 100 mV):
The Body Effect
The threshold voltage of a MOSFET is dependent on the potential between the source of the MOSFET and its body. Consider Figure 22.2, showing the situation when the body of an n-channel MOSFET is connected to ground and the source of the MOSFET is held VSB above ground. As VSB is increased (i.e., the potential on the source of the MOSFET increases relative to ground), the minimum VGS needed to cause appreciable current to flow increases (VTHN increases as VSB increases). We can relate VTHN to VSB using the body-effect coefficient, g, by
where VTHN0 is the zero-bias threshold voltage when VSB = 0 and fF is the surface electrostatic potential [1] with a typical value of 300 mV. An important thing to notice here is that the threshold voltage tends to change less with increasing source-to-substrate (body) potential (increasing VSB).
The Drain Current
In the following discussion, we will assume that the gate-source voltage of a MOSFET is greater than the threshold voltage so that a reasonably sized drain current can flow (VGS > VTHN or VSG > VTHP). If this is the case, the MOSFET operates in either the triode region or the saturation region [Figure 22.1(d)]. The
drain current of a long L n-channel MOSFET operating in the triode region, is given by
where mn,p is the mobility of either the electron or hole and Cox is the oxide capacitance per unit area [eox/tox, the dieletric constant of the gate oxide (35.4 aF/mm) divided by the gate oxide thickness]. Typical values for KPn, KPp, and Cox for a 0.5-mm process are 150 mA/V2, 50 mA/V2, and 4 fF/mm2, respectively. Also, an important thing to note in these equations for an n-channel MOSFET, is that VGS, VDS, and VTHN can be directly replaced with VSG, VSD, and VTHP , respectively, to obtain the operating equations for the p-channel MOSFET (keeping in mind that all quantities under normal conditions for operation are positive.) Also note that the saturation slope parameter l (also known as the channel length/mobility modulation parameter) determines how changes in the drain-to-source voltage affect the MOSFET drain current and thus the MOSFET output resistance.
Short-Channel MOSFETs
As the channel length of a MOSFET is reduced, the electron and hole mobilities, mn and mp, start to get smaller. The mobility is simply a ratio of the electron or hole velocity to the applied electric field. Reducing the channel length increases the applied electric field while at the same time causing the velocity of the electron or hole to saturate (this velocity is labeled vsat). This effect is called mobility reduction or hot- carrier effects (because the mobility also decreases with increasing temperature). The result, for a MOSFET with a short channel length L, is a reduction in drain current and a labeling of short-channel MOSFET. A short-channel MOSFET’s current is, in general, linearly dependent on the MOSFET VGS or
To avoid short-channel effects (and, as we shall see, increase the output resistance of the MOSFET when doing analog design), the channel length of the MOSFET is made, generally, 2 to 5 times larger than the minimum allowable L. For a 0.5-mm CMOS process, this means we make the channel length of the MOSFETs 1.0 to 2.5 mm.
MOSFET Output Resistance
An important parameter of a MOSFET in analog applications is its output resistance. Consider the portion of a MOSFET’s I-V characteristics shown in Figure 22.3(a). When the MOSFET is operating in the saturation region, the slope of ID , because of changes in the drain current with changes in the drain- source voltage, is relatively small. If this change were zero, the drain current would be a fixed value independent of the voltage between the drain and source of the MOSFET (in other words, the MOSFET would act like an ideal current source.) Even with the small change in current with VDS, we can think of the MOSFET as a current source. To model the changes in current with VDS, we can simply place a resistor across the drain and source of the MOSFET [Figure 22.3(b)]. The value of this resistor is
where l is in the range of 0.1 to 0.01 V–1.
At this point, several practical comments should be made: (1) in general, to increase l, the channel length is made 2 to 5 times the minimum allowable channel L (this was also necessary to reduce the short-channel effects discussed above); (2) the value of l is normally determined empirically; trying to determine l from an equation is, in general, not too useful; (3) the output resistance of a MOSFET is a function of the MOSFET’s drain current. The exact value of this current is not important when estimating the output resistance. Whether ID,sat (the drain current at VD,sat) or the actual operating point current, ID , is used is not practically important when determining ro.
MOSFET Transconductance
It is useful to determine how a change in the gate-source voltage changes the drain current of a MOSFET operating in the saturation region. We can relate the change in drain current, id, to the change in gate- source voltage, vgs, using the MOSFET transconductance, gm, or
Neglecting the output resistance of a MOSFET, we can write the sum of the DC and AC (or changing) components of the drain current and gate-source voltage using
If we hold the DC values constant and assume they are large compared to the AC components, then by simply taking the derivative of iD with respect to vgs, we can determine gm. Doing this results in
Notice how the change in transconductance is linear with drain current when the device is operating in the subthreshold region. The larger incremental increase in gm is due to the exponential relationship between ID and VGS when the device is operating in the weak inversion region (as compared to the square law relationship when the device is operating in the strong inversion region).
MOSFET Open-Circuit Voltage Gain
At this point, we can ask, “What’s the largest possible voltage gain I can get from a MOSFET under ideal biasing conditions?” Consider the schematic diagram shown in Figure 22.4(a) without biasing circuitry shown and with the effects of finite MOSFET output resistance modeled by an external resistor. The open-circuit voltage gain can be written as
Layout of the MOSFET
Figure 22.5 shows the layout of both n-channel and p-channel devices. In this layout, we are assuming that a p-type substrate is used for the body of the NMOS (the body connection for the n-channel MOSFET is made through the p+ diffusion on the left in the layout). An n-well is used for the body
of the PMOS devices (the connection to the n-well is made through the n+ diffusion on the right in the layout). An important thing to notice from this layout is that the intersection of polysilicon (poly for short) and n+ (in the p-substrate) or p+ (in the n-well) forms a MOSFET. The length and width of the MOSFET, as seen in Figure 22.5, is determined by the size of this overlap. Also note that the four metal connections to the terminals of each MOSFET, in this layout, are floating; that is, not connected to anything but the MOSFETs themselves. It is important to understand, since the p-substrate is common to all MOSFETs on the chip, that this would require the body of the n-channel MOSFET (again the p+ diffusion on the left in the layout) be connected to VSS (ground for most digital applications).
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