Decibel table , Connectors and connections and Modem connector pin numbers

By -

Decibel table

The decibel figures are in the centre column: figures to the left represent decibel loss, and those to the right decibel gain. The voltage and current figures are given on the assumption that there is no change in impedance.

image

Connectors and connections

Data interchange by modems

When transmitting and receiving data across telephone or other circuits, the equipment which actually generates and uses the data (e.g. a computer or VDU terminal) is known as data terminating equipment (DTE). The equipment which terminates the telephone line and converts the basic data signals into signals which can be transmitted is known as data circuit-terminating equipment (DCE). As far as the user is concerned the interface between DTE and DCE is the most important. CCITT recommendation V24 defines the signal interchanges and functions between DTE and DCE; these are commonly known as the 100 series interchange circuits:

image

Modem connector pin numbers

The connectors used with 100 series interchange circuits and its pin assignments are defined by international standard ISO 2110 and are (for modems following the CCITT recommendations V21, V23, V26, V26bis, V27 and V27bis) as follows:

image

Automatic calling

A similar series of interchange circuits is defined in CCITT recommendation V25 for automatic calling and answering between modems over the telephone network. This is the 200 series of interchange circuits.

image

EIA 232

The EIA equivalent of CCITT V24 interface is the EIA 232 specification, which similarly defines the electrical interface between DTE and DCE. Although the two have different designations, they are to all practical purposes equivalent. The EIA 232 interchange circuits are:

image

EIA 449

The EIA 232 standard, although the most common, is by no means perfect. One of its main limitations is the maximum data rate — 18.2 Kbaud. Various improved interchange circuits (EIA 422, EIA 423) have been developed. The EIA 449 standard is capable of very fast data rates (up to 2 Mbaud):

image

Centronics interface

Most personal computers use the Centronics parallel data transfer to a printer. The pin connections of the connector, abbreviations and signal descriptions are shown.
All signals are standard TTL, although not all signals necessarily exist in any given interface.

image

EIA 232/EIA 449/V24 comparison

image

image

 

Comments

Post a Comment

Popular posts from this blog

Square wave oscillators and Op-amp square wave oscillator.

By -
Image
Square wave oscillators If Fourier analysis is performed on a square wave it is found that the waveform is composed of many harmonics of the fundamental frequency. This rich harmonic content makes the square wave particularly useful as a quick test of amplifier performance. Examples of possible results are shown. The simplest way to produce a square wave is to make a sine wave oscillator in one of the ways described earlier, then feed the output to some form of squaring circuit such as a Schmitt trigger. This is the method adopted in most commercial sine/square wave generators. There are, however, several circuits for square wave oscillators and a description of the most common follows. Multivibrator Technically the multivibrator is a relaxation oscillator, working on the charging of a capacitor through a resistor. If a negative edge is applied to the circuit in (a), transistor TR 1 turns off the for time taken for the base voltage to return to 0 V. If the voltage step is
Read more

Adders:Carry Look-Ahead Adder.

By -
Image
Carry Look-Ahead Adder As previously stated, the carry, c i +1, produced at the i -th position is calculated as c i +1 = x i · y i ∨ c i ·( x i ⊕ y i ). This means that a carry is generated if both x i and y i are 1, or an incoming carry is propagated if one of x i and y i is 1 and the other is 0. Therefore, letting g i denote x i y i , we have c i +1 = g i ∨ c i p i , where p i = x i ⊕ y i . Here, g i is the formula for the carry generation condition at the i -th position, i.e., when g i is 1, a carry is generated at this position. Substituting g i –1 ∨ p i –1 c i –1 for c i , we get A carry look-ahead adder can be realized according to this expression, as illustrated in Figure 41.10 for the case of four bits [21]. According to this expression, c i +1’s are calculated at all positions in parallel. It is hard to realize an n -bit carry look-ahead adder precisely according to this expression, unless n is small, because maximum fan-in and fan-out restriction is violated at higher
Read more